1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to an input and output circuit of a semiconductor device.
2. Description of the Related Art
As semiconductor device fabrication technologies are advanced to implement deep-submicron lines, power supply voltages of semiconductor devices are lowered to 3.3V or below, but systems utilizing such semiconductor devices operating at or below 3.3V still operate at a higher voltages, such as 5V.
Generally, an input and output circuit of a semiconductor device comprises an input buffer connected to an input pad for buffering an input signal input from an input pad and an output buffer connected to an output pad for buffering an output signal output from an internal circuit of a semiconductor device and outputting the buffered signal to an output pad.
An input buffer and an output buffer of a conventional semiconductor device perform a tolerance function under power on conditions of the device, but do not perform a tolerance function under power off conditions of the device. Accordingly, in the case where a high voltage is input to the input and the output buffers of the device under power off conditions of the device, a conventional input buffer and output buffer are disadvantageous in that gate oxides of MOS transistors in the input and the output buffers of the device may be damaged from high voltage differences between gates and sources/drains of the MOS transistors composing the input and the output buffers. In addition, a conventional semiconductor device has a disadvantage in that leakage current flows through the MOS transistors in the input and the output buffers under power on and off conditions of the device.
Accordingly, it is desirable to provide an input and output circuit of a semiconductor device having a tolerance function for making the semiconductor device stably operate even when a high voltage higher than an internal power supply voltage of the semiconductor device is input to the device.